Drift-Resistant Flasher
hard
Keeps one-second ON and OFF phases aligned without accumulating scan-cycle delays.
What it teaches
If Flasher is built by restarting a timer each half-cycle, two copies on different PLCs slowly walk out of step — each restart discards the gap between the timer passing preset and the logic noticing. Harmless on one indicator lamp, wrong wherever a cycle must stay aligned with the clock or other equipment. The fix: never restart. One elapsed-time timer, phase derived from the total, error bounded at one scan instead of growing.
Inputs and outputs
| Tag | Type | Default | Description |
|---|---|---|---|
| In_Enable | BOOL | — | Enable signal |
| Out_Flash | BOOL | — | Drift-resistant flashing output |
Required behavior
- When In_Enable changes to 1, Out_Flash starts at 1 immediately.
- While In_Enable remains 1, Out_Flash alternates between 1 and 0 at 1000 millisecond boundaries measured from the original enable time.
- If a boundary falls between scans, Out_Flash changes on the first scan on or after that boundary. A late scan must not move later boundaries or accumulate timing drift.
- When In_Enable is 0, Out_Flash is 0 and the timing cycle resets. The next enable starts a new ON phase from zero.